1. Field of the Invention
The present invention relates to a wide band amplifier and, more particularly, to a wide band amplifier which provides an extensive band width for amplification and which can vary its gain.
2. Description of the Prior Art
FIG. 1 shows a circuit diagram of a conventional wide band amplifier capable of varying its gain. This wide band amplifier has four transistors Q1 through Q4. The transistors Q1 and Q2 are differentially connected, and so are the transistors Q3 and Q4.
The collector of the transistor Q1 and that of the transistor Q4 are connected to a power supply V.sub.CC via a load resistance RL. The collector of the transistor Q2 is connected to that of the transistor Q3, while the collector of the transistor Q4 is connected to that of the transistor Q1. The transistors Q1 and Q2 have their emitters commonly connected to a constant current source 1. Likewise, the transistors Q3 and Q4 have their emitters commonly connected to a constant current source 2. The base of the transistor Q2 and that of the transistor Q4 are connected to a bias supply 3. The voltage .DELTA. V that determines the gain of this amplifier is supplied to the bases of the transistors Q1 and Q3. It follows that changing the voltage .DELTA. V varies the gain of the amplifier. In the description that follows, the voltage .DELTA. V will be replaced by a constant K.
A signal voltage V.sub.IN is fed to the emitters of the transistors Q3 and Q4 via a first resistor R.sub.IN1 and to the emitters of the transistors Q1 and Q2 through a second resistor R.sub.IN2. An amplified output V.sub.OUT is retrieved from the collector of the transistor Q1. A collector capacitance C.sub.CS1 is interposed between the collector of the transistor Q1 and the substrate. Likewise, a collector capacitance C.sub.CS4 is interposingly provided between the collector of the transistor Q4 and the substrate.
The wide band amplifier of the above construction work as follows:
Applying a signal voltage V.sub.IN causes a current i.sub.1 and a current i.sub.2 to flow through the first resistor R.sub.IN1 and the second resistor R.sub.IN2, respectively. If a current I.sub.0 flows through the constant current sources 1 and 2, another current K(I.sub.0 -i.sub.2) flows through the emitter of the transistor Q1, and yet another current (1-K).multidot.(I.sub.0 -i.sub.1) through the collector of the transistor Q4. The amplified output V.sub.OUT of the circuit operating in the above manner is given as ##EQU1##
An alternate-current gain G is obtained as ##EQU2##
When K=0, the minimum gain M.sub.IN G is given as EQU M.sub.IN G=RL/R.sub.IN1
When K=1, the maximum gain M.sub.AX G is provided as EQU M.sub.AX G=RL/R.sub.IN2
where, R.sub.IN2 &lt;R.sub.IN1.
When the value of the constant K falls within a range of EQU 0.ltoreq.K.ltoreq.1
the gain characteristic turns out to be as depicted by a solid line curve A in FIG. 2. In the circuit of FIG. 1, the resistor R.sub.IN1 is installed so as to determine the minimum gain. Illustratively, when the resistor R.sub.IN1 is provided in the form of the load resistance RL, the gain is available multiplied by 1 (=RL/RL.sub.1) up to RL/R.sub.IN2. If the resistor R.sub.IN1 is not provided, the gain is available multiplied by 0 up to RL/R.sub.IN2, the characteristic of the gain being shown by a broken line curve B in FIG. 2. (Internal resistance r.sub.e of the transistor Q4 is ignored here).
In the wide band amplifier of FIG. 1, the frequency characteristic thereof is determined by the output load resistance RL and by the collector capacitances C.sub.CS1 and C.sub.CS4 added to the collectors of the transistors Q1 and Q4.
That is, when C.sub.CS1 =C.sub.CS4 =C.sub.CS, the frequency characteristic f.sub.C of the circuit in FIG. 1 is given as EQU f.sub.C =1/2.pi.(2.multidot.C.sub.CS)RL (3)
With this wide band amplifier, an attempt to extend the frequency characteristic f.sub.C with no change in the maximum gain G (RL/R.sub.IN2) would require either reducing the collector capacitance C.sub.CS (from equation (3)) or lowering both the input resistance value R.sub.IN1 and the load resistance RL.
However, as far as the NPN transistor arrangement is concerned, the semiconductor device manufacturing process necessarily puts constraints on the ways to reduce the collector capacitance C.sub.CS.
The frequency f.sub.C may be extended with no change in the gain by making the input resistance value R.sub.IN2 and the load resistance RL smaller. But reducing the input resistance value R.sub.IN narrows the dynamic range of the input signal V.sub.IN that is determined by the input resistance value R.sub.IN and by the current I.sub.0 flowing across the collector C to the emitter E of the transistor Q1. Thus to keep the dynamic range of the input signal V.sub.IN intact would require raising the current I.sub.0.
In an NPN transistor arrangement formed within an IC semiconductor device, the collector current and the transition frequency f.sub.T per transistor take on the characteristic graphically shown in FIG. 8, the frequency being such that the current amplification degree h.sub.FE of the grounded emitter becomes 1. Assume that I.sub.0' stands for the collector current in effect when the frequency f.sub.T is maximum. When the collector current becomes greater than the value I.sub.0', the frequency f.sub.T abruptly drops and so does the current amplification degree h.sub.FE. This increases the base current of the transistor Q1 but inversely lowers the gain G. Consequently, as with the collector capacitance C.sub.CS, the maximum allowable current value is uniquely determined by the semiconductor device manufacturing device. That is, the wide band characteristic is necessarily limited.
The amplifier circuit of FIG. 3 is proposed as one prior art solution to the above-described problem. This circuit has the output load capacitance RL and the collector capacitance C.sub.CS of the transistor Q1 formed in a single component. The gain characteristic of the circuit in FIG. 3 is plotted by the curve B in FIG. 2. This construction allows the circuit to extend its frequency characteristic. One disadvantage of the prior art circuit of FIG. 3 is that the output DC level fluctuates due to the voltage .DELTA. V for determining the gain. As a result, when the dynamic range of the amplifier is required of its output stage, the dynamic range can be lowered depending on the magnitude of the voltage .DELTA. V.